The present invention relates to a solid-state image device using a charge coupled device, and more specifically a solid-state image device that can improve image quality. The present invention also relates to a method for driving such a device and a process for manufacturing the same.
Recently, a solid-state image device presented by a charge coupled device (CCD) is widely used for its advantages such as low noise characteristics.
FIG. 12 illustrates a structure of a solid-state image device in the prior art. In this figure, a plurality of photodiodes (photoelectric converters) 1 and vertical CCDs (first charge transfer devices) 2 are arranged two-dimensionally. Each of the photodiodes 1 is connected to the corresponding vertical CCD 2. The end portion of each vertical CCD is connected to a horizontal CCD (a second charge transfer device) 3. The end portion of the horizontal CCD 3 is connected to an output amplifier (a signal output circuit) 4 that works as a charge detector.
A signal charge generated by photoelectric conversion in the photodiode 1 of each pixel is supplied to the vertical CCD 2 to be transferred in it. A plurality of the vertical CCDs 2 transfer signal charges simultaneously and give them to the horizontal CCD 3. The signal charges corresponding to a line of pixels are transferred in the horizontal CCD 3 and supplied to the output amplifier 4 in turn, which converts the signal charges into a sequential output voltage signal.
FIGS. 13-15 illustrate a structure of the horizontal CCD in the prior art, which is driven by a two-phase driving method. FIG. 13 is a partial plan view showing the horizontal CCD in the direction rotated 90 degrees from that of FIG. 12. FIG. 14 shows a cross section along line a'-a" of FIG. 13 and its potential distribution in a channel portion. FIG. 15 shows a cross section along line a-a' of FIG. 13 and its potential distribution in a channel portion.
In these figures, numeral 5 denotes a p-type region, i.e., a p diffusion layer or a p-type semiconductor substrate. Numeral 6 is an n-type region, i.e., an n diffusion layer that is used as a channel portion of a so-called buried type channel CCD. Numeral 7 is an n.sup.- -type region, i.e., an n.sup.- diffusion layer. Elements 8a and 8b are first layer electrodes to which a driving pulse is applied, and 9a and 9b are second layer electrodes to which a driving pulse is applied. The first layer electrodes 8a and the second layer electrodes 9a are connected to a voltage applying terminal 11, while the first layer electrodes 8b and the second layer electrodes 9b are connected to a voltage applying terminal 10. In FIG. 14, an electrode 12 of the end portion of the vertical CCD is also shown.
FIG. 16 shows voltage waveforms of the two-phase driving pulse .phi. H1 and .phi. H2 applied to the voltage applying terminals 10 and 11 respectively. The potential distribution of the channel portion at t=t1 in FIG. 16 is illustrated by full lines in FIGS. 14 and 15, while the potential distribution at t=t2 in FIG. 16 is illustrated by broken lines in FIGS. 14 and 15.
As shown in FIG. 16, at t=t1, H (high) level voltage is applied to the voltage applying terminal 10 and L (low) level voltage is applied to the voltage applying terminal 11. Thus, as shown by the full line in FIG. 15, a potential level of the transfer channel facing the first layer electrode 8b and the second layer electrode 9b becomes higher than that of the transfer channel facing the first layer electrode 8a and the second layer electrode 9a. This potential difference forms a depletion region that is called a "potential well". In this potential well the signal charge 13 is accumulated.
At t=t2, the voltage applied to the voltage applying terminal 11 is switched to the H level and the voltage applied to the terminal 10 is switched to the L level. Consequently, the signal charge 13 is transferred from the potential well in the channel portion facing the first layer electrode 8b to the potential well in the channel portion facing the first layer electrode 8a to become signal charge 14. It is desired that charge quantity of signal charge 14 is equal to that of signal charge 13.
Signal charges are transferred sequentially in the horizontal CCD by repeating the above mentioned operation. The n.sup.- -type regions 7, which are formed in the n-type region and face the second layer electrodes 9a, 9b, enable easy movement of charges by smoothing potential steps between portions facing the first layer electrodes 8a and 8b.
The charge transfer operation in the vertical CCD shown in FIG. 12 is performed basically in the same way as the horizontal CCD 12. However, the transfer speed is much slower in the vertical CCD than in the horizontal CCD. Therefore, the vertical CCD usually does not have the structure such as the n.sup.- -type regions 7 mentioned above. Three or four-phase driving pulse can smooth the potential steps.
In a video camera using such a solid-state image device, for example, some signal charges of pixels located in the periphery of the screen may be abandoned for a certain operation such as electronic image stabilizing (EIS). For example, signal charges corresponding to tens to one hundred and more lines of the start and end portions of a field are abandoned out of the signal charges transferred to the horizontal CCD from the vertical CCD in every field.
For an efficient abandoning operation within a vertical blanking period, a special structure of the horizontal CCD has been proposed as disclosed in Japanese laid-open patent application (Tokukaihei) 2-205359. This structure has a potential barrier region and a charge drain region formed along the side of the horizontal CCD opposite to connection side with the vertical CCDs. This structure enables the draining of charges transferred from the vertical CCD to the horizontal CCD, directly from the side of the horizontal CCD into a power supply line. In this case, the vertical CCD has two transfer modes, a normal mode and a high-speed mode. In the normal mode the signal charges are transferred at a low-speed synchronizing with the horizontal CCD, while in the high-speed mode the signal charges are transferred quickly without synchronizing with the horizontal CCD for abandoning the unnecessary signal charges.
In the above mentioned solid-state image device of the prior art, the operation for abandoning the unnecessary signal charges should be completed within the vertical blanking period. If the operation is not completed within the vertical blanking period and some unnecessary signal charges remain in the horizontal CCD, a certain deterioration of image would occur. For example, a white horizontal line would appear on the upper side of the screen. Therefore, it is necessary to optimize the structure of the potential barrier region and the charge drain region in connection with driving parameters to abandon the unnecessary charges in the vertical blanking period using such a horizontal CCD with the potential barrier region and the charge drain region. Some unnecessary signal charges that have not overflowed the potential barrier should be abandoned by a transfer operation in the horizontal CCD within the vertical blanking period.
The present invention is aimed at an optimized structure of the horizontal CCD of the solid-state image device and its driving method for abandoning the unnecessary signal charges efficiently and surely through the charge drain region and by the transfer operation of the horizontal CCD within the vertical blanking period. It is also the object to present an efficient process for manufacturing such a solid-state image device.